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A Hierarchical Tiling Algorithm for Tile Based Rendering with Global Scratch Counter under Multi Core Environment (IEEE)
Publication Year:
2012
Abstract:
As mobile computing technologies are developed, multi-core processors are introduced to the mobile devices. Multi-core, multi-thread systems require parallel processing software. In this paper, we propose an effective method of tile based rendering for a multi-core based GP-GPU environment.[1] A tile based rendering technique is adopted to reduce an amount of data transfer between the processor and external memory for resource-limited mobile environment.[2] The proposed algorithm is parallelized for multi-core environment with Global Scratch Counters. Tiling performance is also improved using hierarchical tiling technique.
Paper available at IEEE.
Institution:
Dept of Computer Engineering, Seokyeong University, Seoul, Korea
Groups:

BayWebSoft